CPU memory map: Difference between revisions
(Adds initial CPU memory map.) |
(Combine physical address space tables, separate hardware register bank tables.) |
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== Physical address space == | == Physical address space == | ||
The physical address space varies by console type | |||
The physical address space varies by console type. | |||
{| class="tabular" | {| class="tabular" | ||
! Bank || | ! Bank || PC Engine || SuperGrafx || PC Engine CD | ||
|- | |||
| $00-$7F | |||
| colspan="3" style="text-align:center;" | HuCard | |||
|- | |- | ||
| $ | | $80-$87 | ||
| colspan="2" style="text-align:center;" | (unmapped) | |||
| style="text-align:center;" | RAM (64 KiB) | |||
|- | |- | ||
| $ | | $88-$F7 | ||
| colspan="3" style="text-align:center;" | (unmapped) | |||
|- | |- | ||
| $F8 | | $F8 | ||
| colspan="3" style="text-align:center;" | RAM (8 KiB) | |||
|- | |- | ||
| $F9-$FB || RAM mirrors | | $F9-$FB | ||
| style="text-align:center;" | RAM mirrors | |||
| style="text-align:center;" | RAM (24 KiB) | |||
| | |||
|- | |- | ||
| $FC-FE | | $FC-FE | ||
| colspan="3" style="text-align:center;" | (unmapped) | |||
|- | |- | ||
| $FF | | $FF | ||
| colspan="3" style="text-align:center;" | Hardware registers | |||
|} | |} | ||
Note that a PC Engine CD can be connected to the SuperGrafx as well - created a layout in which both the PC Engine CD's 64 KiB of additional RAM and the SuperGrafx's 24 KiB of additional RAM are available. | |||
== Hardware register bank == | |||
=== PC Engine === | |||
{| class="tabular" | {| class="tabular" | ||
| Line 60: | Line 79: | ||
=== SuperGrafx === | === SuperGrafx === | ||
{| class="tabular" | {| class="tabular" | ||
| Line 79: | Line 93: | ||
| $0020-$03FF || Mirrors of $0000-$001F | | $0020-$03FF || Mirrors of $0000-$001F | ||
|} | |} | ||
=== PC Engine CD === | |||
{| class="tabular" | |||
! Bank $FF offset || Device | |||
|- | |||
| $1800-$180F || CD interface registers | |||
|} | |||
TODO: Do any mirrors exist? | |||
Latest revision as of 14:59, 28 August 2023
Virtual address space
| Address | Purpose |
|---|---|
| $2000-$20FF | Zero page |
| $2100-$21FF | Stack |
| $FFF6-$FFF7 | IRQ2/BRK vector |
| $FFF8-$FFF9 | IRQ1 vector |
| $FFFA-$FFFB | Timer vector |
| $FFFC-$FFFD | NMI vector |
| $FFFE-$FFFF | Reset vector |
The zero page, stack, and vectors exist at fixed locations within the virtual address space. The physical memory backing these can be swapped to any bank at any time, but the virtual addresses cannot be changed. The rest of the virtual address space has no special meaning to the hardware.
Physical address space
The physical address space varies by console type.
| Bank | PC Engine | SuperGrafx | PC Engine CD |
|---|---|---|---|
| $00-$7F | HuCard | ||
| $80-$87 | (unmapped) | RAM (64 KiB) | |
| $88-$F7 | (unmapped) | ||
| $F8 | RAM (8 KiB) | ||
| $F9-$FB | RAM mirrors | RAM (24 KiB) | |
| $FC-FE | (unmapped) | ||
| $FF | Hardware registers | ||
Note that a PC Engine CD can be connected to the SuperGrafx as well - created a layout in which both the PC Engine CD's 64 KiB of additional RAM and the SuperGrafx's 24 KiB of additional RAM are available.
Hardware register bank
PC Engine
| Bank $FF offset | Device |
|---|---|
| $0000-$03FF | VDC (4 registers mirrored) |
| $0400-$07FF | VCE (8 registers mirrored) |
| $0800-$0BFF | PSG |
| $0C00-$0FFF | Timer (2 registers mirrored) |
| $1000-$13FF | I/O port (1 register mirrored) |
| $1400-$17FF | Interrupt controller (4 registers mirrored) |
| $1800-$1FFF | (unmapped) |
Any unmapped address in physical memory can potentially be mapped by an expansion port device or a HuCard, but most HuCards lack any sort of memory mapper and simply use the highest address bit as a chip enable.
SuperGrafx
| Bank $FF offset | Device |
|---|---|
| $0000-$0007 | VDC1 registers |
| $0008-$000F | VPC registers |
| $0010-$0017 | VDC2 registers |
| $0018-$001F | (unmapped) |
| $0020-$03FF | Mirrors of $0000-$001F |
PC Engine CD
| Bank $FF offset | Device |
|---|---|
| $1800-$180F | CD interface registers |
TODO: Do any mirrors exist?
