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- 09:05, 29 August 2023 VCE pinout (hist | edit) [5,411 bytes] Fiskbit (talk | contribs) (Adds VCE pinout. Still need to figure out how to document the analog power connections.)
- 15:43, 28 August 2023 Timing (hist | edit) [496 bytes] Asie (talk | contribs) (Created page with "The (NTSC) PC Engine is clocked with a master clock equal to six times the NTSC color burst (<code>315/88</code> MHz), or approximately 21.47727 MHz. This is divided into the following clocks: * CPU "high" clock speed = master clock / 3 (approx. 7.15909 MHz), * CPU "low" clock speed = master clock / 12 (approx. 1.78978 MHz), * Timer speed = master clock / 3072 (approx. 6.991 KHz), * VCE pixel clocks: ** "10MHz" = master clock / 2, ** "7MHz" = master clock / 3, ** "5MHz...")
- 13:34, 28 August 2023 CPU addresses (hist | edit) [1,065 bytes] Fiskbit (talk | contribs) (Adds explanation of CPU addresses and terms.)
- 13:25, 28 August 2023 CPU memory map (hist | edit) [2,509 bytes] Fiskbit (talk | contribs) (Adds initial CPU memory map.)
- 07:50, 16 August 2023 VDC pinout (hist | edit) [5,062 bytes] Fiskbit (talk | contribs) (Adds VDC pinout.)
- 07:40, 16 August 2023 HuCard pinout (hist | edit) [2,117 bytes] Fiskbit (talk | contribs) (Adds HuCard pinout.)
- 07:31, 16 August 2023 CPU pinout (hist | edit) [5,140 bytes] Fiskbit (talk | contribs) (Adds CPU pinout.)
